This invention relates to a semiconductor device comprising a semiconductor body having a first region providing a current path to a first main electrode and carrying a plurality of active device cells, the majority of the active device cells being connected to a second main electrode for providing a main current path through the device between the first and second main electrode and at least one remaining active device cell forming a monitor cell and being connected to a monitor electrode for providing a monitor current path through the device between the first main electrode and the monitor electrode.
Such a device is proposed in U.S. Pat. No. 4,783,690 and has been described in various other publications, for example U.S. Pat. Nos. 4,553,084, 4,136,354 and 4,893,158.
As indicated in the above-mentioned publications, the current through the at least one monitor cell provides an indication of the current through the whole active device so enabling the current through the device to be monitored during its operation. Furthermore the current through the at least one monitor cell may be used to provide a signal to switch off the active device when the current sensed exceeds a critical limit. For example, where the active device is a power MOSFET or IGBT (Insulated Gate Bipolar Transistor) then the sensed current may be used to provide a signal to reduce the gate voltage to the active device as described in U.S. Pat. No. 4,893,158. When a critical level is reached such a circuit may be used to switch off the device when it reaches its safe operating area (SOA) limit. However, there is a danger that detection of such an overcurrent will occur only when the device is already beginning to fail and that therefore any remedial action, for example to reduce the gate voltage in the case of a power MOSFET or IGBT, in response to the sensed overcurrent will not happen soon enough to prevent failure of the device.